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Digital Logic Circuits
Digital computers have taken a prominent place in engineering and science over the last two decades, performing a number of essential functions such as numerical computations and data acquisition. It is not necessary to further stress the importance of these electronic systems in this book, since you have certainly already had some encounters with digital computers and programming languages. The objective of the chapter is to discuss the essential features of digital logic circuits, which are at the heart of digital computers, by presenting an introduction to combinational logic circuits.
The chapter starts with a discussion of the binary number system, and continues with an introduction to Boolean algebra. The self-contained treatment of Boolean algebra will enable you to design simple logic functions using the techniques of combinational logic, and several practical examples are provided to demonstrate that even simple combinations of logic gates can serve to implement useful circuits in engineering practice. In a later section, we introduce a number of logic modules which can be describe using simple logic gates but which provide more advanced functions. Among these, we discuss read-only memories, multiplexers, and decoders. Throughout the chapter, simple examples are given to demonstrate the usefulness of digital logic circuits in various engineering applications.
Chapter 12 provides the background needed to address the study of digital systems, which will be undertaken in Chapter 13.Upon completion of the chapter, you should be able to:
Perform operations using the binary number system.
Design simple combinational logic circuits using logic gates.
Use Karnaugh maps to realize logical expressions.
Interpret data sheets for multiplexes, decoders, and memory ICs.
1. ANALOG AND DIGITAL SIGNALS
One of the fundamental distinctions in the study of electronic circuits (and in the analysis of any signals derived from physical measurements ) in that between analog and digital signals .As discussed in the preceding chapter ,an analog signal is an electrical signal whose value varies in analogy with a physical quantity
(e.g., temperature, force, or acceleration).For example, a voltage proportional to a measured variable pressure or to a vibration naturally varies in an analog fashion.
Figure 12.1depicts an arbitrary analog function of time, f(t).We note immediately that for each value of time, t, f(t)can take one value among any of the values in a given range. For example, in the case of the output voltage of an op-amp, we except the signal to take any value between +Vsat and –Vsat, where Vsat in the supply –imposed saturation voltage.
A digital signal, on the other hand , can take only a finite number of values. This is an extremely important distinction, as will be shown shortly. An example of a digital signal is a signal that allows display of a temperature measurement on a digital readout. Let us hypothesize that the digital readout is three digits long and can display numbers from 0 to 100°F. Further, the output of the sensor ranges from 0 to 5 volts, where 0V corresponds to 0°F and 5V to 100°F. Therefore, the calibration constant of the sensor is kT=100°-0°/5-0=20°/V. Clearly, the output of the sensor is an analog signal; however, the display can show only a finite number of readouts (101, to be precise). Because the display itself can only take a value out of a discrete set of states—the integers from 0 to 100—we call it a digital display, indicating that the variable displayed is expressed in digital form.
Now, each temperature on the display corresponds to a range of voltage: each digital on the display represents one hundredth of the 5-voltage range of sensor, or 0.05V =50mV. Thus, the display will read 0 if the sensor voltage is between 0 and 49mV, 1 if it is between 50 and 99 mV , and so on. Figure 12.2 depicts the staircase function relationship between the analog voltage and the digital readout. This quantization of the sensor output voltage is in effect an approximation. If one wish to know the temperature with greater precision, a greater number of display digits could be employed.
The most common digital signals are binary signals. A binary signal is a signal that can take only one of two discrete values and is therefore characterized by transitions between two states. Figure 12.3 displays a typical binary signal. In the binary arithmetic (which we discuss in the next section), the two discrete values f1 and f0 are represented by the numbers 1 and 0. In binary voltage waveforms, these values are represented by two voltage levels. For example, in the TTL convention (see Chapter 9), these values are (nominally) 5V and 0V , respectively; in COMS circuits, these values can vary substantially. Other conventions are also used, including reversing the assignment---for example, by letting a 0-V level represent a logic 1 and a 5-V level represent a logic 0. Note that in a binary waveform, knowledge of the transition between one state and another (e.g., from f0 to f1 at t=t2 ) is equivalent to knowledge of the state. Thus, digital logic circuits can operate by detection transitions between voltage levels. The transitions are often called edges and can be positive (f0 to f1) or negative (f1 to f0). Virtually all of the signals handled by a computer are binary. Form here on, whenever we speak of digital signals, you may assume that the text is referring to signals of the binary type, unless otherwise indicated.
2. THE BINARY NEMBER SYSTEM
The binary number system is a natural choice for representing the behavior of circuits that operate in one of two states (on or off, 1 or 0 or the like ). The diode and transistor gates and switches studied in Chapter 9 fall in this category. Table 12.1 shows the correspondence between decimal and binary number systems for decimal numbers up to 16.
Binary numbers are based on powers of 2, whereas the decimal system is based on powers of 10. For example, the number 372 in the decimal system can be expressed as
372=(3×102)+(7×101)+(2×100)
while the binary number 10110 corresponds to the following combination of powers of 2:
10110=(1×24)+(0×23)+(1×22)+(1×21)+(0×20)
It is relatively simple to see the correspondence between the two number systems if we add the terms on the right-hand side of the previous expression. Let n2 represent the number n base 2(i.e., in the binary system) and n10 the same number base 10. Then, our notation will be as follows:
101102 =16+0+4+2+0=2210
Note that a fractional number can also be similarly represented. For example, the number 3.25 in the decimal system may be represented as
3.2510=3×100+2×10-1+5×10-2
while in the binary system the number 10.011 corresponds to
10.0112=1×21+0×20+0×2-1+1×2-2+1×2-3
=2+0+0+1/4+1/8=2.37510
Table 12.1 shows that it takes four binary digits, also called bits, to represent the decimal numbers up to 15. Usually, the rightmost bit is called the least significant bit, or LSB, and the leftmost bit is called the most significant bit, or MSB. Since binary numbers clearly require a larger number of digits than decimal numbers, the digits are usually grouped in sets of four, eight, or sixteen, Four bits are usually termed a nibble, eight bits are called a byte , and sixteen bits (or two bytes ) form a word.
2.1 Addition and Subtraction
The operations of addition and subtraction are based on the simple rules shown in Table 12.2. Note that, just as is done in the decimal system, a carry is generated whenever the sum of two digits exceeds the largest single-digit number in the given number system, which is 1 in the binary system. The carry is treated exactly as in the decimal system. A few examples of binary addition are shown in figure 12.4 , with their decimal counterparts.
The procedure for subtracting binary numbers is based on the rules of Table 12.3. A few examples of binary subtraction are given in Figure 12.5, with their decimal counterparts.
2.2 Multiplication and Division
Whereas in the decimal system the multiplication table consists of 102=100 entries, in the binary system we only have 22=4 entries. Table 12.4 represents the complete multiplication table for the binary number system.
Division in the binary system is also based on rules analogous to those of the decimal system, with the two basic laws given in Table 12.5. Once again, we need be concerned with only two cases, and just as in the decimal system, division by zero in not contemplated.
2.3 Conversion from Decimal to Binary
The conversion of a decimal number to its binary equivalent is performed by successive division of the decimal number by 2, checking for the remainder each time. Figure 12.6 illustrates this idea with an example. The result obtained in Figure 12.6 may be easily verified performing the opposite conversion, from binary to decimal:
110001=25+24+20=32+16+1=49
The same technique can be used for converting decimal fractional numbers to their binary form, provide that the whole numbers is separated from the fractional part and each is converted to binary form (separately)，with the results added at the end. Figure 12.7 outlines this procedure by converting the number 37.53 to binary form. The procedure is outline is outlined in two steps. First , the integer part is converted; then, to convert the fractional part, one simple technique consists of multiplying the decimal fractional part, by 2 in successive stages. If the result exceeds 1, a 1 is needed to the right of the right of the binary fraction being formed (100101…,in our example). Otherwise, a 0 is added. This procedure is continued until no fractional terms are left. In this case, the decimal part is 0.5310, and Figure 12.7 illustrates the succession of calculations. Stopping the procedure outline the procedure outline in Figure 12.7 after 11 digits results in the following approximation:
37.5310=100101.10000111101 Greater precision could be attained by continuing to add binary digits, at the expense of added complexity.
數(shù)字邏輯電路
在過(guò)去的二十年里，數(shù)字計(jì)算機(jī)在工程和科學(xué)中扮演著重要的角色， 執(zhí)行許多必要的功能，例如數(shù)值計(jì)算和數(shù)據(jù)收集。 你已經(jīng)有電子計(jì)算機(jī)和編程語(yǔ)言的一些經(jīng)驗(yàn)， 不必要對(duì)這本書(shū)里的這些電子系統(tǒng)的重要性有進(jìn)一步的壓力。 本書(shū)的目標(biāo)是討論數(shù)字邏輯電路的重要的特征，這是數(shù)字電子計(jì)算機(jī)的核心，提出組合邏輯電路的介紹。
本章從一個(gè)二進(jìn)制的系統(tǒng)討論開(kāi)始，然后介紹布爾代數(shù)。 內(nèi)含的布爾代數(shù)訓(xùn)練將使你能夠使用組合邏輯技術(shù)設(shè)計(jì)簡(jiǎn)單的邏輯函數(shù)， 提供的幾個(gè)實(shí)際例子顯示出邏輯門的組合在工程實(shí)踐可以實(shí)現(xiàn)有用的電路。 在后一部分，我們介紹許多邏輯模塊描述使用簡(jiǎn)單邏輯門，但是提供了更多的高級(jí)功能。 在這些中，我們討論只讀存儲(chǔ)器，多路復(fù)用器，以及譯碼器。 通過(guò)本書(shū)，提供的簡(jiǎn)單的例子在各種工程應(yīng)用方面顯示出數(shù)字邏輯電路的用途。
12章提供必備的背景從事數(shù)字化系統(tǒng)的研究，將在13章詳細(xì)介紹。學(xué)完本書(shū)， 你應(yīng)該能熟練應(yīng)用二進(jìn)制系統(tǒng)， 用邏輯門設(shè)計(jì)簡(jiǎn)單的組合邏輯電路。 使用卡諾圖認(rèn)識(shí)邏輯表達(dá)式。 為多路復(fù)用器，譯碼器存儲(chǔ)器翻譯數(shù)據(jù)真值表。
1.模擬和數(shù)字信號(hào)
在電子電路的研究過(guò)程中的一個(gè)基本區(qū)分(對(duì)從自然界得到的各種信號(hào)的分析)是模擬和數(shù)字信號(hào)之間的一種。在先前的章里討論過(guò)，一個(gè)模擬信號(hào)是連續(xù)變化的一個(gè)電信號(hào) (例如，溫度，力量或者加速度)。 例如，與測(cè)量的易變壓力成正比的電壓或者用模擬方式變化自然震動(dòng)。 12.1章節(jié)描述任意的模擬時(shí)間函數(shù)f(t)。 我們注意到時(shí)間的函數(shù)t，f(t)能在規(guī)定的范圍內(nèi)的任何值中一個(gè)值。例如，就輸出電壓而言，我們希望信號(hào)取+Vsat 和–Vsat,之間的任意值，這里Vsat 是提供的外加電壓。
另一方面，一個(gè)數(shù)字信號(hào)，只能取有限值。 這是一種極其重要的區(qū)別，這不久將被顯示。 例如，一個(gè)數(shù)字信號(hào)是一個(gè)允許數(shù)字讀出的溫度測(cè)量的數(shù)字顯示的信號(hào)。 讓我們假設(shè)，數(shù)字化的測(cè)量結(jié)果輸出值是3 位數(shù)字并且能顯示數(shù)目從0°F到100°F。 更進(jìn)一步，傳感器的測(cè)量從0到5伏特，在那里0 V 相當(dāng)于0°F 和5 V相當(dāng)于100°F。 因此，傳感器的測(cè)量范圍是kT = 100°-0°/ 5-0 =20°/ V。顯然，傳感器的輸出是一個(gè)模擬信號(hào)； 不過(guò)，顯示只能顯示有限的測(cè)量結(jié)果輸出值的數(shù)量(101，是準(zhǔn)確的)。 因?yàn)轱@示本身取離散集中的一些數(shù)字整數(shù)從0到100-我們稱之為數(shù)字顯示，表明變量顯示可以以數(shù)字形式表示。
現(xiàn)在，顯示的每個(gè)溫度需要合適的電壓值： 現(xiàn)實(shí)的每個(gè)數(shù)字表示傳感器5伏電壓幅值的100分之1，或者0.05 V = 50 mV 。 因此， 如果傳感器電壓是在0 和49 mV之間，顯示結(jié)果是0， 如果它在50 和99 mV之間，顯示結(jié)果是1，等等類推。 圖12.2 描繪模擬電壓和數(shù)字測(cè)量結(jié)果輸出值之間的梯形功能關(guān)系。 傳感器的量化輸出電壓是一個(gè)近似值。 如果希望知道溫度更精確的值，則可以用更多的數(shù)字來(lái)顯示。
最常用的數(shù)字信號(hào)是二進(jìn)制信號(hào)。 一個(gè)二進(jìn)制信號(hào)是只能取兩個(gè)離散的值中的一個(gè)并且表示的是兩種狀態(tài)的互相轉(zhuǎn)化。 圖12.3 展示一個(gè)典型的二進(jìn)制的信號(hào)。 在二進(jìn)制的算術(shù)(我們?cè)谙乱徊糠掷镉懻?方面， 1 和0分別表示兩離散值f1 和f0。 用二進(jìn)制的電壓波形，這些值將被兩電壓電平表示。 例如，在TTL電路(參閱第9章)里，這些值(名義上)分別是5 V 和0 V； 在COMS電路里，這些價(jià)值能自由變化。 其他電路里也被使用，包括反轉(zhuǎn)電路 ---例如，在讓一個(gè)0 V電平代表邏輯1時(shí)，一個(gè)5 V電平代表邏輯0。 用二進(jìn)制的波形表示，從一種狀態(tài)到另一種狀態(tài)(例如，從f0到di 在t = t2)之間的轉(zhuǎn)化。 因此，數(shù)字邏輯電路能通過(guò)在不同電壓電平之間實(shí)現(xiàn)。 轉(zhuǎn)化經(jīng)常被叫做極性并且可能是正的(從f1到f0)或者負(fù)的(從f0到f1 )。實(shí)際上二進(jìn)制可以表示出所有的信號(hào)。 從這里開(kāi)始， 每當(dāng)我們談到數(shù)字信號(hào)時(shí)，都表示的是二進(jìn)制信號(hào)，除非另作表明。
2. 二進(jìn)制的數(shù)字系統(tǒng)
二進(jìn)制數(shù)字系統(tǒng)是描述在兩種狀態(tài)的一種轉(zhuǎn)化的電路的行為的自然的選擇 （開(kāi)或關(guān)，1或者0諸如此類)。 在第九章學(xué)習(xí)的二極管和晶體管門電路和轉(zhuǎn)化開(kāi)關(guān)為本章服務(wù)。 表格12.1顯示十位數(shù)和二進(jìn)位數(shù)系之間的轉(zhuǎn)化。 二進(jìn)制數(shù)基于2的權(quán)，而十進(jìn)位制基于10的權(quán)。 例如，在十進(jìn)位制里的372可以被以表示 372=(3* 102)+(7* 101)+(2* 100) 而二進(jìn)制數(shù)10110 可以表示為 10110=(1* 24)+(0* 23)+(1* 22)+(1* 21)+(0* 20)
如果按照下面的規(guī)則，把兩種進(jìn)制的數(shù)互相轉(zhuǎn)化是相對(duì)簡(jiǎn)單的。 讓n2 表示基于二進(jìn)制的數(shù)目n(即，在二進(jìn)制里)和n10表示為基于十進(jìn)制的相同的數(shù)目。 然后，我們的表達(dá)式將如下： 101102 = 16 +0 +4 +2 +0 = 2210
同樣分?jǐn)?shù)也能被類似表達(dá)。 例如，在十進(jìn)制里的3.25可被描述作為3.2510=3×100+2×10-1+5×10-2 同時(shí)二進(jìn)制里10.011可以表示為 10.0112=1×21+0×20+0×2-1+1×2-2+1×2-3 =2+0+0+1/4+1/8=2.37510
表格12.1顯示它采用4位二進(jìn)制數(shù)字，也叫一個(gè)字節(jié)，代表十進(jìn)位數(shù)多達(dá)15個(gè)。 通常，最右邊的字節(jié)叫做最低位或者LSB，并且最左位的字節(jié)叫做最高位或者M(jìn)SB。 與十進(jìn)位數(shù)相比較，二進(jìn)制數(shù)清楚表示十進(jìn)制數(shù)需要許多二進(jìn)制數(shù)字， 二進(jìn)制數(shù)字組成4個(gè)，8個(gè)，或者16 個(gè)一組，4 位被稱為半個(gè)字節(jié)， 8 位被叫為一個(gè)字節(jié)，并且16 位(或者兩個(gè)字節(jié))被叫做一個(gè)字。
2.1加法和減法
加法和減法的規(guī)則基于用表格12.2 顯示的簡(jiǎn)單法則。與在十進(jìn)位制里做一樣， 在給定的數(shù)制里兩個(gè)數(shù)相加其結(jié)果一定大與最大的單個(gè)數(shù)字，在二進(jìn)制也一樣。 進(jìn)位應(yīng)正確處理，想在十進(jìn)制里一樣。 二進(jìn)制加法的一些例子在圖12.4顯示，以及他們的十進(jìn)制加法。 二進(jìn)制減法的算法基于表格12.3的規(guī)則。 二進(jìn)制減法的一些例子在圖12.5 中，以及他們的十進(jìn)制減法。
2.2乘和除
在十進(jìn)位制乘法表內(nèi)，表由102 = 100 個(gè)元素組成，在二進(jìn)制只有22 = 4 個(gè)元素組成。 表格12.4 描述二進(jìn)制數(shù)的完整的乘法表。 在二進(jìn)制內(nèi)也基于與十進(jìn)制相似的那些規(guī)則，表格12.5給出了兩種基本規(guī)則。 我們需要只關(guān)心兩種情況，在十進(jìn)位制，除以零是沒(méi)有意義的。
2.3十進(jìn)制數(shù)轉(zhuǎn)化成二進(jìn)制數(shù)
將一個(gè)十進(jìn)位數(shù)轉(zhuǎn)換為對(duì)應(yīng)的二進(jìn)制數(shù)可以逐次除以2然后逐次檢查余數(shù)。 圖12.6 用一個(gè)例子解釋了這種方法。 結(jié)果在圖12.6 獲得，可以容易證實(shí)從二進(jìn)制到十進(jìn)制的反向變換： 110001 = 25 +24 +20 = 32 +16 +1 = 49
相同的方法可以用于把十進(jìn)制小數(shù)轉(zhuǎn)化成它們的二進(jìn)制形式，把整個(gè)數(shù)分離成整數(shù)部分與小數(shù)部分，然后把每一部分轉(zhuǎn)化為二進(jìn)位形式(分離轉(zhuǎn)化)， 結(jié)果最后相加即可。 圖12.7展示了把數(shù)37.53轉(zhuǎn)化成對(duì)應(yīng)的二進(jìn)制形式。 程序分為兩步。 首先，整數(shù)部分被轉(zhuǎn)化； 然后，為轉(zhuǎn)化小數(shù)部分。一種簡(jiǎn)單的方法是小數(shù)部分乘以2然后看結(jié)果是否超過(guò)1，則1是二進(jìn)制小數(shù)部分到二進(jìn)制的該位的數(shù)值，(100101……在我們的例子里)。 否則，該位為數(shù)字0。 這個(gè)程序繼續(xù)，直到?jīng)]有小數(shù)部分被留下。按照上面的例子，小數(shù)部分是0.5310，并且表12.7說(shuō)明了計(jì)算的連續(xù)步驟。 步驟停止在表12.7 中11位數(shù)字后： 37.5310 = 100101.10000111101 更加精的表述可以通過(guò)繼續(xù)增加二進(jìn)制數(shù)字的位數(shù)來(lái)表述，但復(fù)雜性會(huì)相對(duì)的增加。
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